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1. Implementation algorithm and system for generating PWM frequency for berthing the train at station

Eun-Taek Han, Chang-Sik Park, Ik-Jae Kim, Dong-Kyoo Shin, Vol. 24, No. 5, pp. 37-50, Oct. 2023
10.7472/jksii.2023.24.5.37
Keywords: Phase locked loop, Direct Digital Synthesizer, Hard ware Description Language, Reliability, Availability

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