• Journal of Internet Computing and Services
    ISSN 2287 - 1136 (Online) / ISSN 1598 - 0170 (Print)
    https://jics.or.kr/

Design of High-speed Pointer Switching Fabric


Kyoung-Sook Ryu, Byeong-Seog Choe, Journal of Internet Computing and Services, Vol. 8, No. 5, pp. 161-0, Oct. 2007
Full Text:
Keywords: high-speed switch, switching fabric, Input queueing, Output queueing

Abstract

The proposed switch which has separated data plane and switching plane can make parallel processing for packet data storing, memory address pointer switching and simultaneously can be capable of switching the variable length for IP packets. The proposed architecture does not require the complicated arbitration algorithms in VOQ, also is designed for QoS of generic output queue switch as well as input queue. At the result of simulations, the proposed architecture has less average packet delay than the one of the memory-sharing based architecture and guarantees keeping a certain average packet delay in increasing switch size.


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Cite this article
[APA Style]
Ryu, K. & Choe, B. (2007). Design of High-speed Pointer Switching Fabric. Journal of Internet Computing and Services, 8(5), 161-0.

[IEEE Style]
K. Ryu and B. Choe, "Design of High-speed Pointer Switching Fabric," Journal of Internet Computing and Services, vol. 8, no. 5, pp. 161-0, 2007.

[ACM Style]
Kyoung-Sook Ryu and Byeong-Seog Choe. 2007. Design of High-speed Pointer Switching Fabric. Journal of Internet Computing and Services, 8, 5, (2007), 161-0.